Kinetis SDK Demo Applications User Guide  1.0.0-beta
Freescale Semiconductor, Inc.
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SPI Flash Demo User Guide

User guide on how to use SPI Flash Demo. More...

SPI Flash Demo User Guide

Build

SPI_Flash test program needs SPI flash library, so please build SPI flash library first.

File Description

  • char_handler.h: Character handle functions used in the command_handler.c.
  • cmd_handler.c: Functions to handle the command input console shell.
  • cmd_handler.h: API header of the command handler.
  • spi_flash_test.c: Main functions that create a shell on the console and let the user access the SPI flash.

Hardware environment

In this demo, SPI is used to access flash on a TWR-MEM board.
Put the development board and TWR-MEM board to a TWR-ELEV board. On a TWR-MEM board, SPI flash can be accessed via SPI0. CS can be selected with J14 on TWR-MEM board.


Connection on board:

Function TWR-Kinetis FRDM-Kinetis TWR-MEM
SPI0_MISO PTD0 J2-10 B44
SPI0_MOSI PTD2 J2-8 B45
SPI0_SCLK PTD1 J2-12 B48
SPI0_CS0 PTD3 J2-6 B46
SPI0_CS1 PTD4 J6-4 B47
GND n/a J2-14 B2

Chip selection(CS) can be controlled by J14 pin on TWR-MEM board. Normally, we can insert TWR-Kinetis and TWR-MEM board to TWR-ELEV board.Please visit http://www.freescale.com for more information about TWR-ELEV and TWR-MEM boards.


Command explanation

Probe


probe [[bus:]cs] [hz] [mode]


This function is used to detect the SPI flash on a designated port. It can accept bus, CS, Hz, and mode as parameters.

  • Bus is the SPI module, 0(spi0), 1(spi1).
  • CS is chip select index.
  • Hz is the operation baud rate frequency that is input to the SPI flash.
  • Mode is the clock polarity and clock phase that the SPI flash uses for data communication.
    mode Clock Polarity Clock Phase
    0 Active High First Edge
    1 Active High Second Edge
    2 Active Low First Edge
    3 Active Low Second Edge

    The default value of mode is 0.
Example:

SF Test >probe 0:0 5000000
SF: Detected AT26DF081A with page size 4096, total 1048576

Help


help


The help command shows help for the supported functions.Example:

SF Test >help
SPI flash sub-system
probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus
and chip select
read addr offset len - read `len' bytes starting at
`offset' to memory at `addr'
write addr offset len - write `len' bytes from memory
at `addr' to flash at `offset'
erase offset [+]len - erase `len' bytes from `offset'
`+len' round up `len' to block size

Erase


erase <offset> [+]<len>


This command is used to erase the flash beginning from the designated offset and through the designated length. It can accept offset and len as parameters.

  • Offset is the offset in the SPI flash that erase starts.
  • Len is the length of data that is erased.
  • "+" means round up. If "+" is specified, len is rounded up with the flash sector size.
Example:

SF Test >erase 0x0 0x100000
SF: Successfully erased 1048576 bytes @0x0

Write


write <addr> <offset> <len>


This command writes data in RAM to flash.
It can accept addr, offset, and len as parameters.

  • Addr is the data address in RAM.
  • Offset is the offset in the SPI flash that write starts.
  • Len is the length of data.
Example:

SF Test >write 0x20000000 0x0 0x1000
SF: program success 4096 bytes @ 0x0

Read


read <addr> <offset> <len>


This command reads data from the flash. It can accept addr, offset, and len as parameters.

  • Addr is the data address in RAM.
  • Offset is the offset in the SPI flash that read starts.
  • Len is the length of data.
Example:

SF Test >read 0x20000000 0x0 0x1000
SF: read success 4096 bytes @ 0x0

Update


update <addr> <offset> <len>


This function erases sector and writes data in RAM to flash.
It can accept addr, offset, and len as parameters.

  • Addr is the data address in RAM.
  • Offset is the offset in SPI flash that read starts.
  • Len is the length of data. Ensure that at least 4K RAM can be allocated for the sector size. The update uses the 4K RAM to compare the write data to the data on the flash.

HOWTO Customization

See device/spi_flash for adding a new SPI flash driver.You should check whether the 'spi_cs_activate' and 'spi_cs_deactivate' functions need to be added.
These two functions pull the CS pin up or down.For most flashes that have timing requirements between CS pin and clock, it is better to use GPIO to control this pin in software.
Another benefit is that we can use CS GPIO pin to control start and stop of a transfer, instead of using a halt bit.Example:

status_t spi_cs_activate(spi_slave_dev *spi)
{
switch (spi->cs)
{
case 0:
gpio_write_pin_output(kGpioSpi0Cs0, spi->ss_pol);
break;
case 1:
gpio_write_pin_output(kGpioSpi0Cs1, spi->ss_pol);
break;
default:
break;
}
return 0;
}
status_t spi_cs_deactivate(spi_slave_dev *spi)
{
switch (spi->cs)
{
case 0:
gpio_write_pin_output(kGpioSpi0Cs0, !(spi->ss_pol));
break;
case 1:
gpio_write_pin_output(kGpioSpi0Cs1, !(spi->ss_pol));
break;
default:
break;
}
return 0;
}